A fine (micro- or nano-patterned) Si-based mold is fabricated by a conventional VLSI process and the mold is directly pressed to a thin glass plate using a hot-press machine. Fabrication of fine grating on a glass surface can be achieved by imprint lithography using a Si3N4/SiO2/Si mold and a low Tg glass. The imprint conditions are designed based on the glass surface property measured under a temperature, humidity or pressure controlled condition. Recently micro-fluidics research will rely on the similar imprint and etching processes to create the desired patterns or channel designs as another example in other modern applications.
FDS/Dataphysics can help in the steps of your VLSI processes
Lithography is used to transfer a pattern from a photomask to the surface of the wafer. The photoresistant coverage and wetting nature on the wafer surface will determine the effectiveness of the partner trafer when exposed to (often ultraviolet) light or another source of illumination (e.g. X-ray). Therefore, the surface preparation of the wafer and selection of photoresistant needs to be checked with a contact angle meter OCA and tensiometer such as DCAT, t15, t100, etc.
Etching is used to remove material selectively in order to create patterns. The selectivity and completeness of the etching are always desired by the process engineers and they can be verified with a contact angle device, OCA.
Deposition- A multitude of layers of different materials have to be deposited during the IC fabrication process. The two most important deposition methods are the physical vapor deposition (PVD) and the chemical vapor deposition (CVD). During PVD accelerated gas ions sputter particles from a sputter target in a low pressure plasma chamber. The principle of CVD is a chemical reaction of a gas mixture on the substrate surface at high temperatures. The need of high temperatures is the most restricting factor for applying CVD. This problem can be avoided with plasma enhanced chemical vapor deposition (PECVD), where the chemical reaction is enhanced with radio frequencies instead of high temperatures. An important aspect for this technique is the uniformity of the deposited material, especially the layer thickness. You can use an OCA device to check on the uniformity of the deposited material.
Chemical Mechanical Planarization– Processes like etching, deposition, or oxidation, which modify the topography of the wafer surface lead to a non-planar surface. Chemical mechanical planarization (CMP) is used to plane the wafer surface with the help of a chemical slurry. First, a planar surface is necessary for lithography due to a correct pattern transfer. The CMP slurry formulations can be optimized with a DCAT tensiometer or a MutiScan and the planarity of the wafer after CMP can be examined with a fully automated OCA50 contact angle scanning and mapping features.
Oxidation is a process which converts silicon on the wafer into silicon dioxide. The chemical reaction of silicon and oxygen already starts at room temperature but stops after a very thin native oxide film. For an effective oxidation rate the wafer must be settled to a furnace with oxygen or water vapor at elevated temperatures. Silicon dioxide layers are used as high-quality insulators or masks for ion implantation. The quality of the formed silicon dioxide can be examined with an OCA25 equipped with a temperature, humidity or pressure chamber.
Ion implantation is the dominant technique to introduce dopant impurities into crystalline silicon. This is performed with an electric field which accelerates the ionized atoms or molecules so that these particles penetrate into the target material until they come to rest because of interactions with the silicon atoms. Ion implantation is able to control exactly the distribution and dose of the dopants in silicon, because the penetration depth depends on the kinetic energy of the ions which is proportional to the electric field. With an OCA25 and one of environmental chamber for either electrical field, pressure, temperature or humidity, you can research for an optimized ion implantation process.